1. Field of the Invention
This invention relates to probes for testing electrical characteristics of integrated circuits. In particular, this invention relates to a probe that contacts terminal pads for a semiconductor chip to act as an interface between those pads and a test device.
2. Prior Art
VLSI substrates utilize an array of semiconductor chips mounted on the surface of a multiple layer laminate structure. The chips are located at discreet sites and are typically surrounded by an array of terminal pads, for instance, EC (engineering change) terminal pads. Chip circuit arrays are formed in matrices, typically 3.times.3 or 10.times.10, thereby defining a regular pattern of pads on the substrate surface.
Given the number of EC pads in an array and the exceptionally small spacing between such pads, a probe is necessary to act as an interface between the device under test and the test device itself. The interface conventionally comprises a probe contactor defining an electrical interface between the substrate and the test device and a space transformer controlling the electrical environment to prevent distortion of test signals. The space transformer acts to transform a large number of electrical connectors provided in the tester into a highly dense array that is either similar to or identical to the pad density pattern on the substrate. Such space transformers are known in the technology, for example, shown in U.S. Pat. No. 3,911,361.
In addition to space density considerations, the mechanical characteristics of the substrate introduce difficulties in achieving a satisfactory interface between the space transformer and the substrate. For example, when processing multi-layered ceramic substrates, firing temperatures in the range of 1500.degree. C. are utilized. These temperatures cause the uncured greensheets to shrink and thereby introduce variations in the design size of the substrate. The locations of the chip sites move and there is a similar change in the distance between the EC pad array located circumferentially about the chip site.
If a probe is used having distances which are preselected to correspond to the design distances not only between chip sites but between pads, any deviation in dimension caused by processing makes it impossible to insure that each probe head will contact the respective pad at the chip site.
Additionally, in high temperature processing, variations in the height of the pads are produced. Unless sufficient force is applied to the probes, it may be impossible to insure contact between the probe and the pad having the lowest height. The introduction of such a force supplied to the end of the probe however produces a force on the pad having the greatest height from the substrate surface. If the force is excessive, the pad or the chip itself may be damaged during the test process.
In order to overcome these interface problems, it has been proposed in the prior art to utilize a probe contactor having buckling beam probes. The probes are placed in a housing having alignment dies with each probe configured to deflect over a range of predetermined forces such that the force applied to the pad is constant, that is, given varying heights of the pads, the same force would be applied to each pad by its respective contacting probe since, the probes will deflect to prevent any additional force beyond a predetermined force from being applied to the pad. The buckling also produces a wiping contact to cover an area greater than point contact. This compensates for pad location shifting.
Such a probe configuration is shown in U.S. Pat. No. 3,806,801. This patent shows a housing 11, and a metallic casting having upper and lower alignment dies 10 and 12. As shown in FIG. 1 of the '801 patent, a plurality of probes having electrically conductive wires 16 are supported by the alignment dies. The probes have an insulating cover to prevent electrical contact if they accidentally engage themselves during deflection. Typically, the wires are coated with parylene formed by vacuum deposition.
In order to control the buckling direction of the probes, the '801 patent suggests three techniques:
(a) offsetting the openings in the upper and lower alignment dies; PA1 (b) disposing the opening of the upper alignment die at an angle relative to the corresponding opening in the lower alignment die to slant the longitudinal axis of the wire; and PA1 (c) a combination of offset and angular slanting.
Notwithstanding the advantages offered by a system described in U.S. Pat. No. 3,806,801, a number of deficiencies still remain. First, a significant amount of precision machining is required to construct alignment dies of the type described in the '801 patent, particularly if offsets and angular orientations are utilized to bias the buckling direction of the probes. Secondly, given the fact that VSLI structure is utilized, an array of chip sites, it is necessary to move the probe relative to the substrate to test each of those chip sites. Preferably, clustering of probes rather than in single rows as taught by the prior art should be used to reduce the test time required for a single substrate. In the case of a 10.times.10 array, groups of probes for example two rows, 20 probes, would be required in a clustered arrangement, not possible in the prior art. Additionally, the technique of biasing the beam probe while providing a high degree of confidence vis-a-vis pad contact does not guarantee uniform deflection or buckling when a predetermined axial load is applied thereto. That is, while predetermined buckling may take place, the direction may still vary, causing contact between the wires. Given this degree of unpredictability in buckling direction, prior art beam probes still utilize an insulating covering. Such a requirement however is unduly expensive.
Other prior art systems have been proposed to provide integrated circuit probe assemblies for use in continuity testing. Systems as proposed in U.S. Pat. No. 3,906,363 utilize a contactor assembly having a plurality of metal spring fingers making frictional contact with openings in a printed circuit board. U.S. Pat. No. 3,731,191 shows a multi-probe assembly utilizing a number of probe guides having probe wires removably contained and compressible within the guide elements. The probe wires are designed so that when they are inserted within the probe guide they extend a controlled amount beyond the end of the housing while other ends abut against a pressure plate. The guides are curved to provide the probe wires inserted therein with a spring-like quality during compression. Such systems, while representing alternatives in the prior art with respect to probe assemblies, do not overcome the fundamental deficiencies of clustering, cost considerations and the like.